The following are the some of the research interests of SMART research lab:
– Semiconductor Supply Chain Security, Assurance, and Trust
Semiconductor Integrated Circuits (ICs) are integral to modern technology applications, including microelectronics, critical smart infrastructure, IoT and consumer electronics, connected aerial and ground vehicles, radar and sensors and military applications, and communication networking devices. Unfortunately, the semiconductor IC manufacturing process is becoming more and more challenging due to the increasing demand and insufficient workforce and infrastructure for domestic production, relying solely on a few trusted semiconductor vendors to meet the growing technological needs. For that, the semiconductor IC supply chain has become globalized. The IC semiconductor integrated circuits manufacturing process undergoes several critical stages, from specification to foundry/clean room fabrication, packaging, and testing, before the manufactured IC is shipped to the consumer/market. Vendors from various parts of the world perform semiconductor IC manufacturing design, fabrication, testing, packaging, testing, validation, and integration. Due to such globalization of the semiconductor supply chain, the involvement of untrusted entities has become common, and non-entities involved in the manufacturing process can be deemed trusted. Malicious design alterations can be integrated or fabricated at an untrusted facility during the chip design, fabrication, or packaging process. Supply chain hardware attacks, including hardware Trojans, fault injections, physical tampering, side channel, etc., can subvert the IC’s functionality, leak secret information, or destroy/deactivate during field operation. The current solution to countermeasures against these attacks assumes the design house or the foundry to be trusted. At our research lab, we investigate novel approaches to address the threat of hardware attacks against COTS components, PCB design, FPGA/ASICs, microprocessors, and SRAM Memory devices, assuming a “zero trust” throughout the design and fabrication process.
– Secure, Trusted, and Assured Heterogeneous System Integration (HSI) and Advanced Packaging
Heterogeneous system integration (HSI) has recently drawn much attention in the novel chip design and integration. Heterogeneous 2.5-D and 3-D system integration are among the ongoing state-of-the-art growth, enabling efficient and low-power computing and memory technology design. The 3-D integration allows for enhanced compaction in interconnect length and lowers delay and power consumption. Also, heterogeneous system integration enables multiple planes to be stacked to facilitate low power and design area overhead dedicated to a specific function, such as digital/imaging signal processing, memory, interconnection, and communication applications. Secure and trusted heterogeneous system integration and packaging are among the ongoing growth of state-of-the-art research for enabling assurance and reliability in system-in-package components. This research aims to investigate novel AI-assisted design, lightweight and low-power hardware security, and authentication primitives approaches for trusted HSI. The research works studies the impact of various physical attacks, i.e., hardware Trojans, fault injections, or physical tampering, etc. and propose novel techniques, i.e., lightweight PUFs, design obfuscation, and side channel resistant Designs, etc., to countermeasure against such hardware security threats targeting heterogeneous system integration and packaging.
– ML Hardware-enabled Security to Mitigate EM Side Channel Leakage Attacks
Semiconductor integrated circuits (ICs) are vulnerable to invasive and non-invasive hardware attacks, including laser/optical probing, fault injection, and electromagnetic side-channel (EM) attacks. This research aims to develop a machine learning (ML) assisted approach to identify and mitigate hardware vulnerability leading to EM side-channel leakage attacks. Side-channel emissions are a significant source of data leakage that can compromise the security of hardware devices. These emissions can take various forms, such as electromagnetic (EM), power, or thermal signals, and can be exploited by attackers to extract sensitive information from the device. Therefore, designing hardware with effective countermeasures against side-channel attacks is a critical challenge for hardware security. The current ML approach heavily relies on static techniques for localizing the leakage and needs help to capture complex patterns. Also, those approaches are not resistant to adversarial attacks. As a result, it may give inaccurate results and overlook essential security vulnerabilities in specific cases. To overcome these limitations, we propose to develop an automated ML-assisted security framework based on contextual feature extraction and attention-based fusion modeling to defend against adversarial hardware attacks. Specially, the research aims to enhance hardware security and trust against physical side-channel attacks targeting secret key and hardware-based identification leakage.